Gera is a component of the Leibniz Binary Subsystem. It works by processing data in the Leibniz bus and requires a connection to other Leibniz modules. It features eight individual gate inputs that affect the corresponding individual bits of the Leibniz data. Eight illuminated tact switches allow for manual inverting of each gate input. The primary function of Gera is masking individual bits of the digital data through the AND operation. For example, when connected to Drezno, which is processing a waveform or voltage, masking individual bits yields various forms of quantization. However, Gera does not need Drezno to work. The AND operation is also a basic building block for sequence automation, chaos and rhythm generation, and various cybernetic modular patches. Bit processing logic in Gera is hardware-based; hence there is virtually no latency, and the binary signals may change at extreme rates.
Specifications
- Width: 6hp
- Depth: 30mm
- Power: +25mA / -29mA
